The transmitter of pulsed Doppler radars periodically transmits a pulse of energy, which is herein called a sample, and the receiver is constructed to separate the time between samples into a plurality of components herein called range bins. When a Fast Fourier Transform (FFT) computer is utilized with the Doppler radar, the information or data in a plurality of samples (and the component range bins), herein referred to as a batch, are stored and operated upon by the computer, in a predetermined sequence. Data is received sequentially by samples but is processed in a different order making it necessary to store a large amount of data in cases where the batch size is large. When a random access memory system is used for the storage of batch data, two such memories are generally used where real time processing is required. One of the memories is accessed by the FFT computer while the other is used for inputting the next batch of data.
Large random access memories are extremely expensive and, consequently, it is desirable to eliminate one of the memories in the FFT computer memory system. U.S. Pat. No. 3,633,173, entitled "Digital Scan Converter" and patented Jan. 4, 1972, discloses apparatus utilizing a single random access memory constructed and programmed to read out stored data and write in new data at the same address. However, this apparatus has two major drawbacks, one is that it only operates with a FFT computer having a radix of two and the other is that it does not read out the data sequentially in numerical range bin order. At the present time many Doppler radars utilizing FFT computers are also equipped with constant false alarm rate (CFAR) circuitry which requires data in numerical range bin order. Therefore, the apparatus disclosed in the '173 patent would not be operable in conjunction with CFAR circuitry.